Ask Lemmy
A Fediverse community for open-ended, thought provoking questions
Please don't post about US Politics. If you need to do this, try !politicaldiscussion@lemmy.world
Rules: (interactive)
1) Be nice and; have fun
Doxxing, trolling, sealioning, racism, and toxicity are not welcomed in AskLemmy. Remember what your mother said: if you can't say something nice, don't say anything at all. In addition, the site-wide Lemmy.world terms of service also apply here. Please familiarize yourself with them
2) All posts must end with a '?'
This is sort of like Jeopardy. Please phrase all post titles in the form of a proper question ending with ?
3) No spam
Please do not flood the community with nonsense. Actual suspected spammers will be banned on site. No astroturfing.
4) NSFW is okay, within reason
Just remember to tag posts with either a content warning or a [NSFW] tag. Overtly sexual posts are not allowed, please direct them to either !asklemmyafterdark@lemmy.world or !asklemmynsfw@lemmynsfw.com.
NSFW comments should be restricted to posts tagged [NSFW].
5) This is not a support community.
It is not a place for 'how do I?', type questions.
If you have any questions regarding the site itself or would like to report a community, please direct them to Lemmy.world Support or email info@lemmy.world. For other questions check our partnered communities list, or use the search function.
Reminder: The terms of service apply here too.
Partnered Communities:
Logo design credit goes to: tubbadu
view the rest of the comments
Just joking, I love that you explained further but to be honest I still have no idea what is going on, haha. The bit about "modifying a snapshot of the previous build" sounds like the idea behind binary diffing?
Ok, I looked up Vivado and now I have a better idea. A field very alien to me but fascinating to hear about
FPGAs are good fun, and some of the stuff I'm working on in particular gets even crazier. My current project is emulating a partially analog soundchip (the 6581 and 8580 SIDs) with 32 bit integers, because FPGAs can't do analog. The best part is, it actually (mostly) works. Still have coefficient issues with the RC circuits, and the Rf1 and Rf2 voltage-controlled resistor coefficient tables need to be recalculated, but it's already looking pretty good.
Good fun lol
Are you trying to replicate functionality from older hardware ?
Correct. Goal is to emulate the SIDs, and the filters are analog, so analog simulation is required.