this post was submitted on 29 Dec 2021
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First time I've even heard of this
It's been in progress for a while, but it's not gotten to market yet. The team's pretty small and there is a lot of work to do as with any new architecture. It does provide some interesting potential to vastly reduce the power usage compared to out of order architectures. It also provides various other interesting innovations like an alternative to registers, L1-only memory, a single address space, and an intermediate instruction set that gets specialized to the individual processor.